职称：
副教授 博士生导师
学术经历：
美国加州大学圣芭芭拉分校 电子与计算机工程系 博士
美国哥伦比亚大学 电子工程系 硕士
华中科技大学 电子科学与技术系 学士
个人经历：
官众，博士，高级工程师，广东省高层次人才，中山大学“百人计划”入选者，美国加州大学圣芭芭拉分校电子与计算机工程系博士，博士阶段师从美国EDA领域权威专家、IEEE Life Fellow，Malgorzata Marek-Sadowska教授。在加入中山大学前，官众博士先任职于长江存储美国硅谷研发中心，担任芯片设计工程师，负责代号为“井冈山”的国产首颗64层NAND存储芯片的研发，其后任职于美国新思科技公司（Synopsys Inc.）总部，任高级工程师，负责EDA软件PTPX的功能研发，Ansys的RedHawk到Synopsys的迁移与整合，以及与主流芯片设计公司（包括Apple、Nvidia以及SK-Hynix等）的技术指导。官众博士在美期间主导了两个芯片可靠性的美国国家级科研项目（分别来自于NSF和SRC），其有关信号线电迁移的论文获得了国际高品质电子设计大会（IEEE ISQED）2016年度最佳论文提名奖，其RC电路电流响应快速仿真算法被美国新思科技公司植入旗舰软件PrimeTime中，成为行业标准算法。
研究方向：
基于机器学习、神经网络和AI大模型的芯片后端物理建模与量化仿真，以及相关EDA软件研发。
正在招收博士后、博士、硕士研究生，欢迎联系！
欢迎优秀本科生参与科研项目（长期有效）！
所获荣誉：
国际高品质电子设计大会（IEEE ISQED）2016年度最佳论文提名奖。
科研项目：
《基于级联式PINN的集成电路电迁移可靠性精准建模与快速仿真平台》，国家自然科学基金面上项目，项目负责人（PI），2024-2027。
学术活动：
国际会议评审委员会评委（Technical Program Committee）：
International Symposium on Quality Electronic Design
国际期刊评委：
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- IEEE Transactions on Very Large Scale Integration Systems
- IEEE Journal on Emerging and Selected Topics in Circuits and Systems
- IEEE Embedded Systems Letters
- IEEE Transactions on Circuits and Systems I: Regular Papers
- IEEE Transactions on Circuits and Systems II: Express Briefs
- IEEE Transactions on Circuits and Systems for Video Technology
- ACM Transactions on Design Automation of Electronic Systems
- Circuits, Systems, and Signal Processing, Springer
- Journal of Computational Electronics, Springer
学术著作：
- Z. Wu, C. Luo and Z. Guan, “A Dynamic Capacitance Matching (DCM)-based Current Response Algorithm for Signal Line RC Network,” IEEE Transactions on Circuits and Systems I: Regular Papers (accepted), 2024.
- P. Li, Z. Guan, “Parasitic Capacitance Patterns Grid Density Binarization and Shifted Reflection Step Sequence Encoding for Dimensionality Reduction,” IEEE International Symposium on Quality Electronic Design (ISQED), April 2024.
- W. Guan, K. Yang, Y. Chen, S. Liao and Z. Guan, “A Dimension-Augmented Physics-Informed Neural Network (Dapinn) with High Level Accuracy and Efficiency,” Journal of Computational Physics, Vol. 491, pp. 112360, 2023.
- Z. Guan, “EM-Aware Memory Mapping Algorithms for SRAM Based FPGA,” IEEE International Symposium on Field-Programmable Custom Computing Machine (FCCM), May 2018.
- Z. Guan, M. Marek-Sadowska, “An Efficient and Accurate Algorithm for Computing RC Current Response with Applications to EM Reliability Evaluation,” ACM & IEEE International Conference on Computer Aided Design (ICCAD), Nov. 2016.
- Z. Guan, M. Marek-Sadowska, “Incorporating Process Variations into SRAM Electromigration Reliability Assessment Using Atomic Flux Divergence,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 6, pp. 2195-2207, 2016.
- Z. Guan, M. Marek-Sadowska, “AFD-based Model of EM Lifetime and Reservoir Effect,” IEEE International Interconnect Technology Conference (IITC), May 2016.
- Z. Guan, M. Marek-Sadowska, “AFD-Based Method for Signal Line EM Reliability Evaluation,” IEEE International Symposium on Quality Electronic Design (ISQED), March 2016 (Nominated as Best Paper).
- Z. Guan, M. Marek-Sadowska, “Atomic Flux Divergence-Based AC Electromigration Model for Signal Line Reliability Assessment,” IEEE Electronic Components and Technology Conference (ECTC), May 2015.
- Z. Guan, M. Marek-Sadowska, S. Nassif and Baozhen Li, "Atomic Flux Divergence Based Current Conversion Scheme for Signal Line Electromigration Reliability Assessment," IEEE International Interconnect Technology Conference (IITC), May 2014.
- Z. Guan, M. Marek-Sadowska, S. Nassif, “Statistical Analysis of Process Variation Induced SRAM Electromigration Degradation”, IEEE International Symposium on Quality Electronic Design (ISQED), March 2014.
- Z. Guan, M. Marek-Sadowska, S. Nassif, “SRAM Electromigration Bit-line Mechanism and its Prevention Scheme”, IEEE International Symposium on Quality Electronic Design (ISQED), March 2013.
联系邮箱：
guanzh23@mail.sysu.edu.cn
